1. Field of the Invention
The invention relates to a method for producing semiconductor wafers of silicon, comprising the pulling of a single crystal from a melt contained in a crucible and the slicing of semiconductor wafers from the pulled single crystal, heat being delivered to a center of the growing single crystal at the boundary with the melt during the pulling of the single crystal, and a CUSP magnetic field being applied to the melt. The invention also relates to a device for carrying out the method.
2. Background Art
Growth of single crystals according to the Czochralski method where the melt is exposed to a magnetic field is known as the MCZ method. Magnetic fields have been used for a long time to influence melt flows. In the industrial fabrication of silicon single crystals, horizontal magnetic fields or so-called CUSP fields are used particularly often. JP 61-222984 claims a device for pulling single crystals according to the Czochralski method while imposing a static magnetic field in the melt, which optimizes the temperature distribution in the melt and dampens convection. The CUSP magnetic field is generated by mutually opposite magnetic coils with the same polarity, which are arranged coaxially with the pulling axis of the single crystal.
DE 103 39 792 A1 describes MCZ methods for producing single crystals of silicon, which are optimized with respect to their defect properties. The focus of attention is on intrinsic point defects and their aggregates, as well as on the Voronkov model which allows predictions regarding the formation of such defects. In the case of intrinsic point defects, distinction is made between interstitial silicon atoms (interstitials) and vacancies. If point defects enter supersaturation when the single crystal is being cooled, then silicon interstitials will form aggregates which can be detected in the form of dislocation loops (A-swirl defects, LPITs) and smaller clusters (B-swirl defects). In the event of supersaturation, vacancies form vacancy aggregates (voids) which, depending on the detection method, are referred to, inter alia, as COP defects (crystal originated particles), FPDs (flow pattern defects), LLSs (localized light scatterers) or DSODs (direct surface oxide defects).
It is necessary to ensure that the semiconductor wafers of silicon have no A-swirl defects in the region relevant for producing the components, and that they are as free as possible of COP defects whose size lies in the range of the structure widths of the components or higher. Semiconductor wafers which fulfill these requirements are often referred to as defect-free or perfect, even though their crystal lattice generally contains smaller COP defects or B-swirl defects, or both types of defects.
According to the Voronkov model, that intrinsic point defect type which is incorporated in excess into the crystal lattice when pulling the single crystal depends essentially on the ratio of the pulling rate V, at which the single crystal is pulled from the melt, and the temperature gradient G perpendicular to the phase boundary between the growing single crystal and the melt. If the ratio falls below a critical ratio, then an excess of silicon interstitials is created. If the critical ratio is exceeded, then the vacancies predominate. If there is an excess of vacancies, the size of the COP defects being formed depends essentially on two process parameters, namely the aforementioned ratio V/G and the rate at which the single crystal is cooled in the range of from approximately 1100° C. to 1000° C., the nucleation temperature of voids. The COP defects are therefore commensurately smaller as the ratio V/G lies closer to the critical ratio and the faster the single crystal is cooled in the cited temperature range. In practice, attempts are therefore made to control the two process parameters when pulling the single crystal, so that the defects created by supersaturation of vacancies remain small enough not to interfere with the production of electronic components. Since the structure widths of the components decrease with each generation, the defect size which can still be tolerated decreases accordingly.
Owing to corrosion of the quartz crucible, oxygen will enter the melt. The oxygen forms small precipitates in the single crystal which are termed as grown bulk micro defects or “BMDs”. These are desirable to a certain extent because they can keep metallic impurities lying in the interior (bulk) of the silicon wafer away from the surface (gettering).
If the single crystal is pulled under conditions in which the ratio V/G lies only slightly above the critical ratio, then the interaction of vacancies and oxygen atoms also forms seeds, which give rise to OSF defects (oxidation induced stacking faults). The presence of a zone with such seeds (OSF zone) is usually detected by subjecting a semiconductor wafer, sliced from the single crystal, to oxidation in wet oxygen at about 1000° C. for a few hours so that OSF defects are formed. Since this defect type is likewise detrimental to the functional integrity of electronic components, endeavors are made to suppress their formation, for example by reducing the concentration of oxygen in the melt so that less oxygen is incorporated into the single crystal than would be necessary in order to form OSF defects. The OSF zone can also be avoided by modifying V/G, for example by using higher or lower pulling rates. The formation of OSF seeds can furthermore be reduced by higher cooling rates (in the temperature range of the precipitation at 900° C.).
In the context of the invention, semiconductor wafers of silicon are referred to as low-defect if no OSF defects are detectable and at least 75% of the surface is essentially free of A-swirl defects and COP defects with a size greater than 30 nm.
Particular difficulties in controlling the ratio V/G result from the fact that the single crystal usually cools faster at the edge than at the center, so that the ratio V/G decreases from the center toward the edge. Despite corresponding control, this can lead to unacceptably large COP defects being formed at the center and/or A-swirl defects in the edge region. The dependency of G on the radial position r, i.e. G(r), must therefore be taken into account especially when semiconductor wafers of silicon with a diameter of 200 mm, 300 mm or more are intended to be produced. Variations in V/G as a function of the amount of melt crystallized must likewise be taken into account.
In order to restrict radial variations in the axial temperature gradient G at the phase boundary, the aforementioned DE 103 39 792 A1 proposes to induce a melt flow directed toward the center of the phase boundary. This is achieved, for example, by co-rotating the single crystal and the crucible and applying a CUSP magnetic field to the melt. The heat thereby supplied to the center of the single crystal increases the axial temperature gradient there and equalizes its radial profile. It has however been found that these measures of radially homogenizing G are not on their own sufficient to achieve high yields of low-defect semiconductor wafers. For instance, it is often found in particular that semiconductor wafers of rapidly pulled single crystals have a wide zone with unacceptably large COP defects at their center.